Logic gates, truth tables, Karnaugh maps and logic diagrams
Move fluently between Boolean meaning, truth tables, gate diagrams and simplified expressions.
Boolean logic is representation + reasoning
- describe AND, OR, NOT, NAND, NOR, XOR and XNOR and their role in binary computing;
- construct and analyse truth tables from expressions, circuits and problem descriptions;
- simplify a three-variable result with a Karnaugh map;
- construct logic diagrams using standard gate symbols and simplify expressions/diagrams when appropriate.
Rapid Recall Deck
Attempt each card first. If a term is new, flip and study it, then answer it again without looking. Mark only secure recall as “Know it”.
Standard gates implement binary decisions
Standard-symbol reference
Gate selection
Choose the gate for each requirement: (A) output 1 only if both sensors are active; (B) output 1 when exactly one of two switches is active; (C) output the opposite of one input; (D) output 1 when two inputs match.
A → AND. B → XOR. C → NOT. D → XNOR.
Full truth tables are required up to three inputs
Construct a three-input truth table
For F = (A AND B) OR (NOT C), complete all eight input combinations.
| A | B | C | A AND B | NOT C | F |
|---|---|---|---|---|---|
| 0 | 0 | 0 | |||
| 0 | 0 | 1 | |||
| 0 | 1 | 0 | |||
| 0 | 1 | 1 | |||
| 1 | 0 | 0 | |||
| 1 | 0 | 1 | |||
| 1 | 1 | 0 | |||
| 1 | 1 | 1 |
For rows 000,001,010,011,100,101,110,111: F = 1,0,1,0,1,0,1,1. The intermediate A AND B column is 0,0,0,0,0,0,1,1 and NOT C is 1,0,1,0,1,0,1,0.
Translate words into Boolean structure
From problem description to truth table
A secure door opens only when a valid card is present (C=1) AND either the normal-hours signal is active (H=1) OR an administrator override is active (A=1).
1. Write a Boolean expression for output O. 2. State O for inputs C=1, H=0, A=1 and for C=0, H=1, A=1.
O = C AND (H OR A). For 1,0,1 the output is 1. For 0,1,1 the output is 0 because the valid-card condition fails.
Group cells that differ only in variables that can disappear
Three-variable Karnaugh map
F is 1 for minterms 1, 3, 5 and 7. Fill/group this map using columns BC in Gray-code order 00, 01, 11, 10.
| A \ BC | 00 | 01 | 11 | 10 |
|---|---|---|---|---|
| 0 | 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 1 | 0 |
What single-variable expression does the group of four 1s simplify to?
The four 1s occur exactly where C=1, while A and B change within the group. Therefore the simplified expression is F = C.
Why simplification matters
Explain one benefit of replacing a more complex Boolean expression with an equivalent simpler expression before implementing a circuit.
A simpler equivalent expression can require fewer gates/connections, reducing hardware complexity, cost, propagation delay or power use while preserving the same truth-table behaviour.
Expression → connected standard gates
Construct the logic diagram
Draw a standard-symbol logic diagram for F = (A XOR B) AND (NOT C). Before drawing, describe the connection order.
A ─┐
XOR ───┐
B ─┘ │
AND ── F
C ── NOT ─┘The actual exam diagram should use the standard XOR, NOT and AND gate symbols shown on page 4.
Move both directions: circuit ↔ expression ↔ table
Truth table from a circuit
Analyse this circuit: it first computes X = A NAND B, then F = X AND C. Determine F for A=1, B=1, C=1 and for A=1, B=0, C=1, showing the intermediate X value in each case.
For 1,1,1: A NAND B = 0, so F=0. For 1,0,1: A NAND B = 1, so F=1.
Apply a supplied Boolean law
In an exam, any algebraic law needed for this kind of simplification will be supplied. Suppose the question gives:NOT(A OR B) = (NOT A) AND (NOT B).
Use that supplied law to rewrite NOT(X OR Y). Then state which two gate operations appear in the rewritten expression.
NOT(X OR Y) = (NOT X) AND (NOT Y). The rewritten expression uses NOT on each input and then AND to combine the two results.
The assessment point is to apply a supplied law correctly; students are not expected to memorize an unprovided algebraic law for this purpose.
Construct, then check equivalence
Paper 1-style mini-set
1. Construct the truth-table output column for F = A XOR B.
2. Describe the role of logic gates in binary computing.
3. Construct a logic diagram for F = NOT(A OR B) using standard gate symbols.
- For AB = 00,01,10,11 the outputs are 0,1,1,0.
- Logic gates implement Boolean operations on binary signals and combine them to make hardware decisions/computations inside digital systems.
- Feed A and B into an OR gate, then pass the OR output through a NOT gate; equivalently one NOR gate implements the same function.
Finish the learning cycle
IA — main task
Continue Criterion D development/testing. Keep one concise record of what you changed, why and how you verified it.
Paper 1 — short practice
Construct one three-input truth table, one three-variable Karnaugh simplification and two standard-symbol logic diagrams without revealing the models.
Checkpoint
Use the 2027 Case Study Hub for a 5–10 minute research checkpoint: record one way large-scale generative-image computation depends on efficient digital hardware.